To date, multiple system vendors have converged around Class 3-based solutions (Figure 1), recently announcing their next generation offerings. This industry convergence creates the benefit of economies of scale and broad industry investments into the technology used in this baud rate class, the same class being used for 800G MSA pluggable solutions.

Figure 1.  Acacia and other coherent vendors have announced Class 3 Terabit Era solutions.

Advancements Resulting in 65% Power-per-Bit Savings Over Current Competing Solutions
Doubling the baud rate from Class 2 to Class 3 in silicon was a significant engineering achievement, combining design advancements in high-speed Radio Frequency (RF) and Analog to Digital Converter (ADC) and Digital to Analog Converter (DAC) components plus well-designed co-packaging integration of silicon and silicon photonic (SiPh) components. These achievements led to Acacia’s successful 140Gbaud in-house capability that is being leveraged in the commercially available CIM 8 solution.

With high-volume shipments of multiple coherent Class 2 module products utilizing Acacia’s 3D Siliconization, this proven co-packaging integration solution provided the foundation for extending this capability to Class 3 140Gbaud implementation utilized in the CIM 8 (Figure 2). 3D Siliconization maximizes signal integrity by co-packaging all high-speed components including the coherent Digital Signal Processor (DSP) application-specific integrated circuit (ASIC), transmitter and receiver silicon photonics, and 3D stacked RF components into a single device that is manufactured in a standard electronics packaging house. Silicon technology has demonstrated cost and power advantages over alternative technologies, making it the material system of choice for these higher baud rates. These advancements enabling a doubling of the baud rate have led to a 65% power-per-bit savings of CIM 8 over current competing solutions that utilize alternative optical material systems. In addition, the size and power savings of this latest generation enabled the ability to house this 1.2T 140Gbaud solution in a pluggable form-factor.

Figure 2.  An example of 3D Siliconization used in the CIM 8 module, resulting in a volume electronics manufacturable high-speed single device larger than a quarter.

2^nd Generation 3D Shaping Advances Coherent Performance
The CIM 8 is powered by Jannu, Acacia’s 8^th generation coherent DSP ASIC. The design greatly expands on the success of the Pico DSP ASIC predecessor used in the widely deployed performance-optimized Class 2 AC1200 module (Figure 1). The AC1200 was the first module to introduce 3D Shaping, which provided finely tunable Adaptive Baud Rate up to 70Gbaud as well as finely tunable modulation up to 6 bits/symbol. The AC1200 had achieved record breaking spectral efficiency at the time of its introduction, as evidenced by a subsea trial over the MAREA submarine cable connecting Virginia Beach, Virginia to the city of Bilbao in Spain. Finely tunable baud rate helps maximize spectral efficiency in any given passband channel, converting excess margin into additional capacity/reach, and avoids wasted bandwidth due to network fragmentation.

Figure 3.  A popular feature is the fine-tunability of baud rate introduced by Acacia with the Class 2 AC1200; CIM 8 incorporates the same Adaptive Baud feature (as part of 2^nd Generation 3D Shaping) for Class 3 baud rate tunability.

The 5nm Jannu DSP ASIC in CIM 8 intelligently optimizes optical transmission using 2^nd Generation 3D Shaping with an increased Adaptive Baud Rate tunable range up to 140Gbaud, as well as finely tunable modulation up to 6 bits/symbol using enhanced Probabilistic Constellation Shaping (PCS). With 2^nd Generation 3D Shaping, the CIM 8 module can achieve a 20% improvement in spectral efficiency.

Terabit Era Solutions Provide Full Network Coverage
Class 3 technology not only ushers in the terabit era, but also enables full multi-haul network coverage as the high baud rate capabilities transport nx400GbE client traffic across a service provider’s entire network. Full network coverage is not only enabled by adjustment of the modulation, but also implies the capability to optimize for various network conditions which include overcoming transmission impairments.

Figure 4. CIM 8 1.2T, 1T, 800G, and 400G transmission constellations operating at Class 3 baud rates providing wide network coverage addressing multiple applications.

CIM 8 offers significant power-per-bit reductions as well as cost efficiencies for various optical network transport applications.

DCI/Metro Reaches
For transporting 3x400GbE or 12x100GbE client traffic with metro reaches in a single carrier, the CIM 8 is tuned to ~6 bits/symbol (equivalent to 64QAM, example constellation on left). Data center interconnect (DCI) applications would take advantage of this high-capacity 1.2T transport capability to tie data center locations together. This amounts to 38.4T per C-band fiber capacity.

Long-Haul Reaches

For transporting 2x400GbE with long-haul reaches, the CIM 8 is tuned to ~4 bits/symbol (equivalent to 16QAM, example constellation on the right). Wide 800G network coverage is achieved with the Class 3 140Gbaud capabilities enabling service providers to provide end-to-end 2x400GbE, 8x100GbE, or native 800GbE transport across their networks, covering essentially all terrestrial applications.

Ultra-Long-Haul/Subsea Reaches

And for ultra-long-haul/subsea reaches, the CIM 8 is tuned to ~2 bits/symbol (equivalent to QPSK, example constellation on the left). As with the previous scenarios, spectral efficiency with a wavelength channel is optimized by fine-tuning of the baud rate. These high spectrally efficient modes can carry mixed 100GbE and 400GbE traffic over the longest subsea routes in the world with lowest cost per bit. It’s worth noting that almost a decade ago, Acacia demonstrated SiPh capabilities for subsea coherent deployments. CIM 8 incorporates second generation non-linear equalization (NLEQ) capabilities to mitigate the non-linear effects of optical transmission especially for these ultra-long-haul/subsea links providing additional OSNR.

In all the above scenarios, the CIM 8 utilizes advanced power-efficient algorithms to compensate for chromatic and polarization dependent dispersion. In addition, the module accounts for coverage of aerial fiber network segments that require fast state-of-polarization (SOP) tracking and recovery due to lightning strikes. The SOP tracking speed of CIM 8 is double the speed of its predecessor. This fast SOP tracking feature can also be utilized for sensing applications.

Network Operators Achieve Record Breaking Field Trials with CIM 8
CIM 8 capabilities have already been put to the test as illustrated by multiple record breaking field trials across a wide range of applications. These include >5600km 400G transmission over a mobile carrier’s backbone network, 2200km 800G transmission over a research and education network, and >540km 1T transmission over a wholesale carrier’s network.

Acacia continues to demonstrate its technology leadership by leveraging mature knowledge in proven silicon-based coherent technology, producing the first shipping coherent solution to lead the industry into the Terabit Era with the 1.2T pluggable CIM 8 module. With the breakthrough capability of 140Gbaud transmission along with the advanced Jannu DSP ASIC using 2^nd Gen 3D Shaping and leveraging 3D Siliconization, network operators can support full network coverage for multi-haul applications, especially to support growing demands for nx400GbE and upcoming 800GbE traffic.

References:
Blog: Terabit Today: Maximize Network Coverage
Blog: How Industry Trends are Driving Coherent Technology Classifications
Blog Series: The Road Ahead for Next-Generation Multi-Haul Designs Part 1, Part 2, Part 3

 Over the last 10 years, we’ve seen rapid increases in capacity per wavelength by increasing modulation order from QPSK to 16QAM to 64QAM, as well as increasing baud rate supported by opto-electronic devices. However, beyond the coherent modulation order of 64QAM, the achievable performance isn’t sufficient to address target applications due to the reduction in reach.  As a result, increasing baud rates has been looked to as the primary means of increasing capacity per wavelength.  This requires innovative and cost-effective implementations to provide higher baud rate solutions and packaging advancements.  Opto-electronic integration and co-packaging are techniques that were discussed by Acacia’s Founder and Chief Technology Officer Benny Mikkelsen in his OFC 2019 Plenary talk and continue to be critical to support the ever-increasing need for higher data rates and smaller, cost-effective optical interfaces for cloud, access, and transport applications.

Opto-Electronic Integration and Co-Packaging Explained
These techniques are used to reduce components in size and power while also increasing functionality and performance of the solution. Opto-electronic integration generally refers to the process of integrating a wide range of optical functions on a single chip, such as the large amount of optical and opto-electronic functions being achieved in a photonic integrated circuit (PIC). While co-packaging is the ability to combine multiple chips into a single package which can be further integrated into a transceiver module. The main benefit is that it can then be manufactured as if it’s a single component with even more functions.

Opto-electronic integration, particularly through silicon photonics, enables the miniaturization of coherent transceivers. The benefits of opto-electronic integration can be seen in the below graphic, which shows how the size of a coherent transceiver was reduced significantly over a few product generations.  By leveraging these techniques, each new generation was able to raise the bar to increase capacity while reducing power and size.

Figure 1. Opto-electronic integration and co-packaging have enabled coherent transceivers to become significantly smaller over the last decade.

Three Main Benefits of Opto-electronic Integration and Co-Packaging

1. Reduced Power

It takes a massive amount of power to operate data centers, which is why sustainability ranks top on data center operator’s agendas. Opto-electronic integration and advanced packaging helps lower the power consumption of the coherent modules used for moving data across networks.

The benefit of having multiple devices packaged into one compact component means fewer interfaces and the ability to support higher speeds per lane. Electrical compensation of PCB routed high-speed signals, which consumes power, is essentially eliminated.  As an example, by co-design and co-packaging the trans-impedance amplifier (TIA) and driver chips with the silicon photonics-based PIC on the same substrate as the digital signal processor (DSP) ASIC, the DAC termination can be eliminated and can result in a 35 percent DAC power reduction.

Figure 2. Co-design and co-packaging of the TIA and driver chips with the silicon photonics-based PIC on the same substrate as the DSP ASIC eliminates the DAC termination and can result in a 35% DAC power reduction.

2. Reduced Size

Silicon Photonics
Using silicon as an optical medium and leveraging CMOS fabrication processing technology, silicon photonics allows tighter monolithic integration of many optical functions within a single device. While traditional optics systems used many discrete devices, silicon photonics allows all those devices to fit onto a single silicon chip reducing the size.  Silicon photonics has been a key enabler for achieving the tremendous size reduction in Figure 1.

Component Stacking
In component stacking, the DSP and PIC are tightly co-packaged on the same substrate, and the high-speed modulator driver and TIA components are stacked on the PIC which also reduces the size.  Component stacking is a process widely adopted in the electronics manufacturing process that is now being applied to opto-electronic technology manufacturing.

Co-packaging and Integrated Control IC
Size reductions are achieved by integrating functions and the control IC through co-packaging techniques. Smaller devices can translate into either more functionality within the same form factor and power consumption footprint or a smaller form factor with the same functionality and power consumption as the previous generation. For example, in the Acacia CFP2 form factor, the integration of multiple discrete control ICs into one integrated device led to a 500 percent reduction in board footprint.

3. Increased Capacity

Enhancing DSP and Increasing Baud Rate
With network capacity demands increasing, network operators are challenged with an ongoing need to deploy solutions that can keep up with these capacity demands while being power, size and cost efficient. High speed opto-electronic integration and advanced packaging can deliver high-capacity transport from the state-of-art DSP.

Increasing baud rate has always been an efficient way to enable more cost-effective optical networks by reducing the number of optics required to support a given transmission capacity. By doubling baud rate over previous generations, we can support twice the capacity per carrier over greater reaches than prior generations. This approach provides a simple, scalable path that supports higher capacity per carrier over the reaches needed for existing and new network architectures.

Acacia’s Implementation: 3D Siliconization
Acacia’s approach to co-packaging is called 3D Siliconization technology. This process utilizes highly scalable and reliable volume electronics manufacturing processes which applies 3D stacking packaging techniques to enable a single device to include all the high speed opto-electronic functions necessary for coherent transceivers. With 3D Siliconization, the high-speed RF interfaces are tightly coupled together, resulting in improved signal integrity for high baud rate signals.

Figure 3.  3D Siliconization improves signal integrity and performance via the reduction of electrical inter-connects, in addition to the benefits in cost, reliability, power, and size.

This device decreases footprint by including the DSP, PIC, drivers, and TIAs, and is manufactured using standard CMOS packaging processes that leverage the same reliability, cost, and volume scaling advantages.  This approach is utilized by Acacia’s 400G pluggable family and the 1.2T 140Gbaud Coherent Interconnect Module 8 (CIM 8).

Network operators need to efficiently scale their networks to keep up with growing user bandwidth demands.  To meet this need, it is going to be increasingly important to develop next-generation solutions based on scalable technologies that are aligned with industry trends.

Trends Driving Coherent Optical Development

Coherent Moving to Shorter Reaches
As the industry moves to higher data rates, coherent is being adopted in shorter reach interfaces, which is increasing the share of coherent ports that are deployed in pluggable form factors. For example, the 400ZR specification targeted 80-120km reaches, and subsequently the OIF is now working on a project to define an 800LR that targets 10km and below. As this trend continues, it is likely that we’ll also see coherent move into the data center in future generations. These shorter reach interfaces tend to be higher volume than traditional transport applications, and as we look at this transition, it becomes more important to have interoperability and pluggable form factors that can plug directly into router interfaces.

Standardization is Key
The industry has been steadily moving to more standardization. 400G was a significant step forward and today we have a variety of standardized interfaces including 400ZR/ZR+ and Open ROADM – all of which are growing. These standardized interfaces are displacing both proprietary solutions in more traditional transport applications as well as direct detect solutions in shorter reach interfaces. Over time, most optical industry analysts agree that these standardized pluggable interfaces are expected to contribute a larger and larger portion of all the coherent ports in the industry.  Multi-haul solutions that address multiple applications will still be needed, but it will be important to align these multi-haul investments with standards.

Approaching the Shannon Limit
From a development perspective, incremental improvements in spectral efficiency are being made as we approach the Shannon Limit, but we need to find ways to grow network bandwidth more efficiently over time. In the past, we were able to scale the amount of data being transmitted over a single set of optics, while also increasing capacity on the fiber. Today, we are scaling as we increase baud rate, but the amount of data on the fiber is growing more incrementally. This is changing the way we develop products for the future and increasing baud rate cost-effectively is critical moving forward.

These three trends point to high-volume standardized solutions having a greater influence on next generation industry investment.

Coherent Technology Classifications

The below figure illustrates how coherent technology has evolved in response to growing bandwidth demands. Different baud rate classes are grouped based on technological capabilities, industry standardization (such as OIF, IEEE, Open ROADM, OpenZR+ MSA, CableLabs, ITU, IEEE) and common industry investments. Throughout this evolution, it has been critical that each successive class support similar reaches to the previous class.

Baud rate has doubled for each coherent technology class.

Class 1
There was a long period during the early days of coherent technology development with multiple investment nodes. At 30-34 Gbaud, there were 100G and 200G products and the industry made a significant investment at this stage. In this generation, there was widespread standardization of components such as modulators and receivers. However, standardized optical interfaces sacrificed significant performance compared to proprietary implementations, so they were not widely adopted.

Class 2
This is where the industry is today, and it is during this stage that standardized optical interfaces are being widely deployed for the first time. The first Class 2 products were proprietary interfaces supporting multi-haul applications in embedded module form factors. Later, 400G faceplate pluggables, driven by standardization efforts that drove heavy investments into products centered around 16QAM, 60+Gbaud per 75GHz channel transmission were introduced with strong industry adoption. When we migrated to Class 2, we doubled the baud rate and enabled an increase in the data rate.

Class 3
These products once again represent a doubling of baud rate compared to the class before it, with products migrating to 120-136 Gbaud. This approach of doubling baud rate is utilized in standards because it allows for this doubling of data rate using the same modulation format as the previous class. 4 bits/symbol was chosen for 400G standards because it supports a wide range of applications. When scaling from 400G to 800G, doubling the baud rate is the logical path forward.

Class 4
These products will continue the trend we saw in the earlier classes where the model is to increase baud rate but take additional steps to cover all applications. Like earlier trends, we expect the baud rate to also double from Class 3 to Class 4 products, while utilizing the same modulation order.

“These classifications basically mirror industry investment cycles, which is absolutely the right way to align coherent technology development around,” said Alan Weckel, Founder and Technology Analyst at 650 Group. “At the end of the day, operators need solutions to be cost effective and the best way to do that is to leverage the investment across all the various applications and benefit from higher volume production and scale. Increasingly coherent ports are moving to pluggable form factors and as we approach the Shannon Limit, further improvement in cost will come from going to higher baud rates, but in cost effective way.”

Acacia’s Class 3 Solution
Acacia’s recently announced Coherent Interconnect Module 8 (CIM 8)  is a Class 3 solution that can address transmission of multiple 400GbE client interfaces over virtually any network application, delivering 1.2T per carrier capacity for high-capacity DCI interfaces and 800G per carrier capacity over most optical links using 4 bits/symbol (~16QAM) modulation. This product supports 150GHz channels with double the capacity per carrier and longer reach than that of the previous class, providing a simple, scalable path that is compatible with the previous network architecture generation.

Acacia’s CIM 8 is the industry’s first 1.2 faceplate pluggable coherent module, powered by Acacia’s Jannu 5nm CMOS digital signal processor (DSP) ASIC. This solution delivers industry-leading performance with single carrier 1.2T operation and combines the Jannu DSP with 3D Siliconization packaging technology which includes the silicon photonics integrated circuit (SiPh PIC), high-speed modulator driver and transimpedance amplifier (TIA) in a single opto-electronic package. With 3D Siliconization, the high-speed RF interfaces are tightly coupled together, resulting in improved signal integrity for high baud rate signals. The high-density packaging as well as an advanced high-speed modulator design that enables the 140Gbaud performance as explained in this white paper.

The Future of Coherent Development

As the coherent technology classifications chart highlights above, the industry has undergone several large investment phases.  This has been good for the industry because it allowed vendors to have a significant ROI, worked well with network operator upgrade cycles, and avoided many small iterative steps in between. However, moving forward it is going to be important to align with these industry investments. As a result, we need to think about how to develop solutions that scale to high volume in a power-efficient and cost-effective way. Silicon photonic based coherent interfaces have proven to be successful in meeting these challenges generation after generation and we believe this technology can continue to help effectively meet bandwidth demands of the future.

1.2T Delivering Maximum Capacity, Reach & Fiber Efficiency

Acacia, now part of Cisco, is once again introducing a ground-breaking coherent solution with the industry’s first 1.2 terabits per second (1.2T) faceplate pluggable coherent module, highlighting a new 8th generation Coherent Interconnect Module family, powered by Acacia’s Jannu 5nm CMOS digital signal processor (DSP) ASIC. This solution delivers industry-leading performance with single carrier 1.2T operation and combines the Jannu DSP with 3D Siliconization packaging technology which includes the silicon photonics integrated circuit (SiPh PIC), high-speed modulator driver and transimpedance amplifier (TIA) in a single optoelectronic package.

The Jannu DSP is designed to offer network operators the ability to maximize transmission data rate across a wide range of multi-haul network applications including DCI, metro, long-haul and subsea. “By leveraging the latest 5nm CMOS process node and our advanced signal processing algorithms, we’re delivering exceptional performance with less than half the power per bit of competing solutions, enabling a pluggable deployment model,” says Christian Rasmussen, Sr. Director, DSP and Optics Engineering and Founder at Acacia.

The Industry’s Next Class of Coherent Interconnect

The architecture of the new Coherent Interconnect Module 8 (CIM 8) solution builds upon the success of the Acacia AC1200 product family and aligns closely with the latest client data rates and coherent industry standardization efforts. The CIM 8 is designed to enable network operators to double their transmission capacity over even greater reaches. For links requiring maximum capacity, the new module can provide 1.2T capacity over a single wavelength.

“Historically, Acacia has been a groundbreaker in advancing coherent technology, and the company continues to demonstrate a long-term vision for how multi-haul coherent optics should evolve over time,” said Dr. Scott Wilkinson, Lead Analyst for Optical Components at Cignal AI. “Acacia’s new Coherent Interconnect Module is a great example of market leadership. This solution is a logical next step following the widely adopted Pico DSP-based products and will provide pluggability that is attractive to both traditional and cloud operators.”

The below figure illustrates how coherent technology has evolved in response to growing bandwidth demands. Different baud-rate classes are grouped based on technological capabilities, industry standardization (such as OIF, IEEE, Open ROADM, OpenZR+ MSA, CableLabs, ITU) and common industry investments. As the below figure depicts, the next class of coherent optical products, Class 3, enables a doubling of baud rates from the current Class 2 technology. Class 2 products include both multi-haul embedded modules and 400G faceplate pluggables where the latter was driven by standardization efforts that drove heavy investments into products centered around 16QAM, 60+Gbaud per 75GHz channel transmission.

Throughout this evolution, it has been critical that each successive class provide network architecture compatibility to the previous class, primarily reach and channel width. Acacia’s Class 3 product will support 150GHz channels with double the capacity per carrier and longer reach than that of the previous class, providing a simple, scalable path that is compatible with the previous network architecture generation.

The CIM 8 family is a Class 3 solution that can address transmission of multiple 400GbE client interfaces over virtually any network application, delivering 1.2T per carrier capacity for high-capacity DCI interfaces and 800G per carrier capacity over most optical links using 4 bits/symbol (~16QAM) modulation.

Leading in Performance and Fiber Utilization

The Jannu DSP features Acacia’s second-generation 3D Shaping technology, which leverages enhanced probabilistic constellation shaping (PCS) algorithms and Adaptive Baud Rate, a feature introduced in Acacia’s Pico DSP and widely embraced by network operators. The Jannu DSP provides customers with continuous baud rate adjustment up to 140Gbaud to optimize utilization of available spectrum in a single-span or in cascaded ROADM paths. These 3D Shaping features give service providers unprecedented transmission flexibility to match their network’s architecture, optimize fiber utilization, simplify deployment, and save on both CAPEX and OPEX.

As a single carrier design, the Jannu DSP also includes Acacia’s advanced line-rate processing algorithms to efficiently overcome fiber transmission impairments over greenfield or brownfield fiber infrastructures. These power-efficient algorithms are designed to compensate for linear and non-linear impairments, as well as provide state-of-polarization (SOP) tracking with industry leading response times. In addition, the Jannu DSP leverages Acacia’s new innovative soft-decision error correction (SD-FEC) to further enhance performance.

Scaling Optical Network Architectures

Acacia has been working towards a clear vision of how to cost-effectively scale network capacity for many years. The Jannu DSP builds on the performance and architectural benefits that have made the Pico DSP such a successful Class 2 coherent solution, but with double the baud rate and enhanced performance that supports transmission up to 1.2T in 150GHz channels. With adaptive baud rate capabilities, the CIM 8 also offers maximum capacity over any reach and channel plan.

“Today is an exciting new milestone in Acacia’s history as we once again introduce an exciting new product that delivers the type of disruption needed to cost-effectively scale network capacity in the future,” said Mehrdad Givehchi, Sr. Director of Engineering for Hardware and Software and Founder at Acacia. “With every generation of product, we have been able to deliver higher transmission data rates, lower power consumption and higher performance and I am proud to see this new product carry on that legacy.”

Crossing the Pluggable Terabit Threshold with High-Density Integration

Acacia’s 3D Siliconization is a major contributing factor in how the CIM 8 can cross the terabit capacity threshold and support faceplate pluggable optics that simplify network deployment and maintenance. 3D Siliconization applies integration and 3D stacking packaging techniques to enable a single device to include all the high-speed optoelectronic functions necessary for coherent transceivers. This device decreases footprint by including the DSP, SiPh PIC, drivers, TIAs, and is manufactured using standard CMOS packaging processes that leverage the same reliability, cost, and volume scaling advantages. With 3D Siliconization, the high-speed RF interfaces are tightly coupled together, resulting in improved signal integrity for high baud rate signals.

The high-density packaging as well as an advanced high-speed modulator design provides superior frequency response that enables the 140Gbaud performance as explained in this white paper.

Acacia Technology Leadership and Vision

Transforming industry trends into a development strategy takes the kind of vision Acacia has repeatedly shown in driving the adoption of pluggable digital coherent optical (DCO) modules based on silicon photonics. However, Acacia’s silicon photonics expertise expands beyond just pluggable coherent solutions. As shown in the above figure, Acacia has previously introduced multi-haul products in previous classes. In fact, the AC400 Class 1 product was the first commercially deployed all silicon photonics-based coherent module for submarine applications and the silicon photonics-based AC1200 was the industry’s first Class 2 multi-haul solution. The newly introduced CIM 8 continues this history of technology leadership by providing industry leading performance based on the same silicon photonics used in high volume pluggable modules. In addition, Acacia is leveraging the investments being made in next-generation standardized solutions. Aligning these developments helps Acacia to accelerate time to market for both standardized and multi-haul products and benefit from the combined scale.

Acacia was a pioneer of silicon photonics for coherent applications in 2012 when it was the first coherent module vendor to envision silicon as the platform for the integration of multiple discreet photonic functions, increasing the density and reducing cost of optical interconnect products.

“Acacia’s vision and technology leadership has enabled us to transform coherent transmission. Our pioneering role in silicon photonics has led to the introduction of industry leading coherent pluggable and multi-haul solutions,” said Benny Mikkelsen, CTO and Founder of Acacia. “With every new product introduction, we have delivered the right solution at the right time to help our customers meet their growing bandwidth demands, and this new product introduction is a culmination of this proven technology leadership.”

To learn more, visit Coherent Interconnect Module 8 page or contact us.

Acacia was a pioneer of silicon photonics in 2012 when it was the first coherent module vendor to envision silicon as the platform for the integration of multiple discreet photonic functions while increasing the density and reducing cost of optical interconnect products. According to Gazettabyte, Acacia’s choice to back silicon photonics for coherent optics was an “industry trailblazing decision.”

Leveraging advancements in silicon photonics processing, Acacia was able to deliver generations of high-volume silicon photonics-based products that continually enabled higher transmission data rates, lower power, and higher performance than the generation before it. Early on, some skeptics dismissed silicon photonics as incapable of achieving the performance required for coherent optical transmissions over long-haul distances. As evidenced by today’s deployments of Acacia’s 1.2T multi-haul AC1200 coherent optical module in well over a hundred customer networks which include subsea, long-haul, regional, metro and DCI applications, it is clear that silicon photonics can achieve industry leading performance.

Today, Acacia’s solutions leveraging silicon photonics are available in a wide range of coherent optical interfaces, from edge and access to subsea applications, to enable high-speed transmission and excellent performance.

Acacia’s silicon photonics leadership timeline for coherent transmission.

The Power of Silicon Photonics

Using silicon as an optical medium and leveraging CMOS fabrication processing technology, silicon photonics allows tighter monolithic integration of many optical functions within a single device. While traditional optics systems used many discrete pieces, silicon photonics allows all those pieces to fit onto a single silicon chip.  This tight integration is what has allowed component vendors to continually drive reductions in the cost and size of optical solutions. For network equipment manufacturer customers, using the silicon photonics chip means they can design more ports per linecard, increasing the capacity of their system.

Below are a few reasons that silicon photonics has been so successful and has emerged as a key technology for existing and future optics solutions.

• Leverages CMOS Processes– Silicon photonics leverages the higher yields and lower cost associated with CMOS. Leveraging mature silicon process technologies means that much larger wafers can be made in silicon than traditional optics materials. Today’s silicon photonics solutions run on lines that accommodate up to 12-inch wafers or larger. These larger wafers result in an order of magnitude more dies per wafer, which lowers cost.
• Enables Package Level Integration – As the industry continues to move toward higher data rates and lower power, the interface between the DSP and high-speed optics is quickly becoming a bottleneck. Every time a high-speed signal needs to transition across an additional electrical interface (solder bumps, wire-bonds, vias, PCB traces) there is loss and distortion. Compensating for this additional loss adds power dissipation, and distortion limits performance. Using silicon photonics enables package-level integration that can better optimize these high-speed interfaces and accelerate the realization of higher data rates at lower power.  In addition, silicon photonics is temperature tolerant and thus is not affected by the heat-generating DSP.
• Ensures High Reliability –
  • Overall, silicon photonics increases reliability with the high level of integration reducing the number of component interconnects, which are a common source of failure
  • Traditional optics degrade in high-moisture environments, requiring optics to be packaged in costly hermetic gold boxes, which are historically one of the most common sources of failure for optics. Silicon, on the other hand, does not require hermiticity so by using silicon photonics the costly gold boxes are eliminated which improves reliability
  • In addition to having higher yields than traditional optics materials, silicon photonics can also be tested at the wafer level. Good die can be identified early in the process, and there is no labor wasted on material that will ultimately fail thereby reducing cost.
• Simplifies Deployment and Management – Pluggable modules with industry standard interfaces allow vendors to simplify their networks.

Higher baud rate designs

The next battle for the industry is achieving higher baud rates in a cost-effective way. As the gap to Shannon’s Limit narrows, it is becoming more difficult to increase channel capacity by increasing the modulation order while keeping the same transmission distance. This leaves higher baud rates as a preferred method to increase capacity and decrease cost per bit. Silicon photonics and advances in packaging technology enabled by silicon photonics are key for enabling higher baud rate designs.

Component Stacking

In component stacking, electrical impairments are reduced due to very short electrical connections between key RF components, creating a robust signal path for extremely high frequency/baud rate operation. In this stacked design, the gold-box packaging is eliminated, the DSP, and PIC are tightly co-packaged on the same substrate, and the high-speed modulator driver and TIA components are stacked on the PIC.  Stacked design has a higher (better) frequency response than the traditional gold-box design. Advanced stacking designs can further reduce interconnect impairments, resulting in even higher frequency response.

Illustration of example electrical interconnect frequency response comparing traditional gold-box and stacking integration shows that stacking provides a path to >100Gbaud.

New, Innovative Architectures and Future Innovations

Because of its ability to drive performance and volume manufacturability, silicon photonics has the potential to unlock new architectures needed to keep up with rising demand.  An example is pluggable coherent transceivers that can be plugged directly into switches and routers offering the same density for both coherent DWDM and client optics in the same chassis.  It can also drive future generations of optics design that push the envelope on performance, cost, complexity, and size.

The industry is now turning to silicon to produce a wide variety of devices, using mainstream silicon manufacturing process technologies that have matured over many years.  As optical transceivers need to support higher data-rate, driven by the demand for higher speed networks that can handle the rising bandwidth demand, we believe silicon photonics will once again allow the capacity to grow without significantly increasing the size and cost of the devices needed for the future. For this reason and the benefits discussed above, Acacia plans to use silicon photonics in all coherent applications going forward to help customers stay ahead of the curve.

OptiNet China takes place on the heels of OFC this year and its program will be focused on highlighting how optical networking, transport and DCI technologies are now more essential than ever to support and meet the growing needs of 5G, cloud services, and other major infrastructure projects. Throughout the two-day event, leading industry experts will discuss their latest developments.  One of the trends we expect to be discussed is coherent evolving towards shorter reach applications.

The Evolution is Real
Once considered a long-haul technology, coherent is now firmly entrenched in the metro and moving to even shorter reaches such as service provider edge/access and data center interconnect to campus and intra-data center.  Today’s coherent technology solutions offer a smaller footprint and lower power consumption driven by advancements in silicon photonics and by leveraging high-volume manufacturing processes from the electronics world and applying integration and co-packaging techniques.

As data rates are increasing from 400G to 800G and even 1.6T, these coherent solutions can provide the scalability, flexibility, operational simplicity, and cost advantages that network operators need to address their evolving network needs.  With a history of proven innovation in coherent optical interconnects and high-performance DSPs, Acacia offers a broad range of optical coherent solutions to meet the wide variety of needs of our customers. Check out our portfolio of product offerings at this link.

Come See us Speak
Fenghai Liu, Acacia’s Director of Product Line Management, will virtually present a session titled “Coherent Evolving to Shorter Reaches” on Day 2, June 17^th at 14:15 Beijing time. In his presentation, he will discuss how coherent solutions are evolving towards shorter reaches for intra data center applications.  You can find more information on Fenghai’s talk at this link or you can go directly to the OptiNet China program here.

If you are attending or just want to connect with one of our executives, click here to set up a meeting.

400G Pluggables Enter Deployment Phase
We are now seeing our service provider and hyperscaler customers preparing for an aggressive ramp to 400G services in the second half of 2021. They see significant opportunities to use coherent optics in switches and routers to simplify architectures and achieve reductions in CapEx and OpEx. In the last 6 months, there have been trial and testing announcements from Windstream Wholesale , Telia Carrier, and Colt highlighting the use of 400G pluggables in a carrier network environment. More recently, ADVA announced interoperability of Acacia’s high-performance coherent platform in a QSFP-DD form factor with ADVA’s new DCI OLS, providing DCI networks a clear path to a compact and cost-efficient optical layer assembled with best-in-class innovation. The success of these ongoing trials and tests have demonstrated the architectural benefits that 400G pluggables can provide to cloud data center interconnect (DCI) and service provider network operators.

Going Further Faster with High-Performance Embedded Solutions
Demand for high-performance embedded solutions continues to climb as network operators look for solutions that improve efficiency and maximize capacity utilization while reducing network cost.

To meet these requirements, next generation embedded coherent solutions should be able to maximize spectral efficiency and include features such as 150GHz-wide channels that double the channel bandwidth of current 75GHz. A 150GHz channel plan is important for accommodating higher aggregate baud rates (128Gbaud and beyond) that can expand 400G capacity over a much greater distance compared to 64Gbaud.

With their ability to operate beyond 100Gbaud, next-generation embedded solutions can allow network operators to evolve their networks to meet growing bandwidth demands, without sacrificing reach or stranding network bandwidth when migrating from current-generation solutions. SiPh opto-electronic integration and packaging are important tools for delivering this increased performance and functionality in the future.

Today, solutions such as Acacia’s Pico-based, AC1200 1.2 Terabit coherent optical module are meeting the needs of many markets including cloud, metro, long-haul, and submarine network applications by providing high performance and flexibility features required to address these demanding requirements.  In fact, the AC1200 module is deployed in more than one hundred networks around the globe and adopted by three of the four largest hyperscalers.

Coherent in Access Networks
The wired and wireless network infrastructure supporting today’s aggregated residential customer traffic and enterprise business services is driving bandwidth capacity higher than legacy infrastructure can support based on traditional optical transmission technology. While direct-detect solutions in service provider edge and access links encounter capacity and reach limitations, coherent technology can bridge the gap to higher bandwidth and longer distances on any deployed fiber type. Coherent also provides an operationally simple solution and comes in a range of form factors, such as QSFP-DD and CFP2, to address different network applications for cable, 5G wireless X-haul and enterprise services such as single-transmission P2P links, DWDM links, and single-fiber BiDi links. Read more in this white paper.

Come See us During OFC
This year we are excited to be participating in 6 panels that cover some of the key trends mentioned.

Here’s the full line up of Acacia speakers at this year’s show. On behalf of all our speakers below, we hope to see you there virtually.

• Status of Optoelectronics Multi-chip Modules in Acacia, Long Chen
  Sunday, June 6, 2021 1:00 PM – 3:30 PM PDT
• Market Watch Panel III: Terabit WDM Channels: Beyond 100GBaud Operation, Tom Williams
  Tuesday, June 8 14:30 – 16:00 PDT
• Challenges of Coherent Transponders Approaching the Shannon Limit, Christian Rasmussen
  Tuesday, June 8, 2021 14:00 PM – 16:00 PM PDT
• Next Generation Optical Interfaces, an IEEE and Industry Update, Tom Williams
  Wednesday, June 9 13:30 – 14:30 PDT
• 400ZR Deployment and What’s Next – an OIF Update, Tom Williams
  Friday, June 11 11:30 – 13:00 PDT
• Silicon Photonic Based Stacked Die Assembly for 4×200-Gbit/s Short-Reach Transmission, Ying Zhao
  Friday, June 11 6:00 AM PDT

Acacia will have a virtual booth (#1041) during the show, which you can access at this link.  We look forward to virtually meeting with our customers, partners, and suppliers.  We are also excited that this is Acacia’s first year participating as part of Cisco. You can find their virtual booth (#1441) at this link.

If you are attending the show virtually and want to connect, we’d welcome the opportunity to meet with you. Click here to set up a meeting with Acacia spokespeople.

Coherent pluggables have emerged as an effective way of meeting this challenge through recent advancements in silicon photonics, opto-electronic integration, and CMOS nodes with lower power consumption. By leveraging coherent solutions, network operators can overcome the many challenges they face today when trying to scale to higher data rates in a cost effective and operationally simplistic way.

Network operators should consider the following link design challenges, benefits, and form factors when preparing to use coherent pluggables.

Accommodating Different Link Designs
Edge and access networks consist of many different links such as dedicated point-to-point (P2P) fiber links, higher-capacity dense wave-division-multiplexed (DWDM) links, or fiber-constrained routes requiring single-fiber bidirectional (BiDi) P2P or DWDM links. The below image shows examples of different connectivity solutions in the service provider edge/access portion of the network.

Coherent Technology for Edge and Access
Unlike capacity and reach limitations of direct-detect solutions for service provider edge and access links, coherent technology can easily bridge the gap to higher bandwidth and longer distances on any deployed fiber type. Coherent also provides an operationally simple solution, which played an important role in driving its adoption in longer-reach environments.  Key benefits include:

• Coherent transmission tolerance
• Monitoring, diagnostics, and troubleshooting
• Reliability
• Scaling to higher data rates (100G and above)

Module Form Factors for Edge and Access
Acacia offers a range of modules in QSFP-DD and CFP2 form factors to address different network applications for cable, 5G wireless X-haul and enterprise services such as single-transmission P2P links, DWDM links, and single-fiber BiDi links.

All these solutions leverage Acacia’s 3D Siliconization approach, which utilizes high-volume manufacturing processes and benefits from the maturity of Acacia’s silicon photonics technology. With these solutions, Acacia has leveraged its 10 years of high-performance coherent transmission expertise to specifically address edge and access applications in terms of form factor, power consumption and cost.

Want to Learn More?
Read the white paper “Coherent for Service Provider Edge and Access Network Applications.”

Sign up for this upcoming Omdia webinar titled “Pluggable coherent modems: The future is here” that will help you understand the use cases and applications for coherent pluggable modems as well as gain insights for net

Since 2002, the IEEE Photonics Award has been given out every year to recognize amazing achievements in the field of photonics. The criteria used as a basis for judging includes “outstanding discovery, significant or technological advancement, important invention, impact on the field, and quality of the nomination”^[1]. Recipients are selected by the Technical Field Awards Council of the IEEE Awards Board. Chris will receive his award, which consists of a bronze medal, certificate, and honorarium, at OFC 2020.

Acacia Communications extends its congratulations to Chris for being awarded the very prestigious IEEE Photonics Award and for his many exceptional innovations over the years!

[1] “IEEE Photonics Award.” IEEE. 2019. Accessed July 25, 2019. https://www.ieee.org/about/awards/technical-field-awards/photonics.html

Advancements in silicon photonics are changing the optical networking industry. That change is in part fostered by the discussions and learning that happens at industry events. Chris Doerr, Ph.D., Associate Vice President of Advanced Development at Acacia, recently co-chaired the 15th International Conference on Group IV Photonics in Cancun, Mexico where they discussed the hottest silicon photonic trends. We asked him a few questions about the conference and the content he helped guide.

Q: You recently co-chaired the Group IV Photonics conference. Can you share some background on the event and your role there?

Chris:  I co-chaired the event with Milos Popovic from Boston University and helped set the agenda and recruit speakers for the three-day conference. The Group IV Photonics conference is an academically-driven industry conference that hosted approximately 90 attendees in Cancun this year. It is intended to deliver insights on current and future innovations in regards to photonics and to facilitate discussion among colleagues in the field. Representatives from companies like Intel, IBM and HP gathered alongside university experts from MIT and University of California – Santa Barbara for a single-session conference that encouraged open and honest conversation on industry’s latest innovations and challenges.

Q: What was the key theme of the Group IV Photonics conference?

Chris: We identified two core areas we wanted to address through session topics and plenary discussions at the event. The first addressed electronic-photonic integration. This essentially means identifying the best methods for integrating photonics. What was once seen as too expensive for wide adoption is now receiving renewed attention from companies. They are interested in uncovering best practices such as, how do you integrate electronics and photonics? Do you use the same chip, or do you co-package? Acacia demonstrated co-packaged optics and electronics on a ball-grid-array package last year.

The second plenary discussion was on a very hot topic at the moment – neuromorphic computing, which can be used for deep learning. We’re starting to see this technology applied to advanced technology, such as self-driving cars. For instance, it’s impractical to have a supercomputer in your car, but in order for self-driving cars to become commonplace, they need to be equipped with technology can differentiate between a person and a mailbox. Neuromorphic computing can do this faster, with a smaller computer and with less power.

Q: Why are conferences like Group IV Photonics so important to the future of the industry?

Chris: I’ve found that at these smaller industry conferences there is less noise to break through. Participants are more comfortable expressing their opinions and having open dialogues about what they are seeing and doing than they typically are at larger trade show events. These intimate events are better suited to candidly address industry-wide issues and other topics that might feel too sensitive to bring up at a larger conference where media and analysts are listening. It is an opportunity to focus on longer term innovations.

Q: How does Acacia and its innovations fit into the future of photonics?

Chris: We see more opportunity for applications of silicon photonics across industries than we did several years ago. The new developments discussed at the conference require more computational power than ever before, meaning more capacity and higher speed, and optical networks are necessary to share processing and information between computers.

Thank you to my co-chair and the rest of the event team for a wonderful conference, and I look forward to next year!